1. Field
This disclosure relates generally to memory arrays, and more specifically, to a byte writeable memory with bit-column voltage selection and column redundancy.
2. Related Art
Increasingly, to reduce power consumption, newer generation of integrated circuits are using a lower supply voltage. The lower supply voltage when used to read/write a memory included in the integrated circuit, however, degrades the performance of bitcells of the memory. In particular, the lower supply voltage results in a lower read/write margin for the bitcells. To address this problem, some memories may have voltage boosting circuits, which boost the voltage supply to a bitcell when necessary. For example, during a read operation, the bitcell voltage can be increased relative to the wordline voltage, but during a write operation, the bitcell voltage can be decreased relative to the wordline voltage.
This selective voltage application scheme, however, requires additional logic for proper functioning of memories having redundant column bits with multiple bytes on the same wordline. In particular, during a write operation, the redundant column bits may not be written. Thus, there is a need for a method for accessing a byte writeable memory with bit-column voltage selection so that the redundant columns are provided an appropriate voltage.